A charge-based capacitance model of short-channel MOSFETs

channel effects are included in the model. In this model, charge conservation holds and channel charge partitioning are properly treated. The simulation results clearly show the importance of 2-11 field-induced effects to short-channel MOS devices. Comparison of the simulated results with reported experimentally measured data shows that the proposed model is far more reliable than the analytical model. The proposed method can be used to link a device simulator and a circuit simulator for accurate timing calculation in both digital and analog MOS integrated circuits. 1. INTRODUCTION ITH THE ADVENT in silicon MOS-VLSI technology and the scaling down of device size, precise characterization of small geometry MOS transistors and their associated circuit models are becoming increasingly important for predicting the performance of VLSI circuits, particularly for ac small signal or transient simulation purpose in designing DRAM and switching ca-pacitor circuits. Two important characteristics needed for circuit simulation are the MOS dc (I-V) and ac (C V) models. Much work has been devoted to the study of dc models for small geometry VLSI devices. On the other hand, by comparing with the development of dc models, insufficient effort has been placed on the ac characterization of these devices. The capacitances associated with a MOSFET include 1) overlap capacitances, 2) junction capacitances, and 3) intrinsic capacitances. Shown in Fig. 1 is a cross sectional view of a MOSFET with various capacitances indicated and a complete circuit model of MOSFET in SPICE2. It shows the nonlinear dc circuit model and all of the above capacitances. Among them, overlap capacitances, such as CGDO, CGSO, CGBO, are linear capacitances and process-dependent, and can be measured from the test-key of IC process; junction capacitances, such as CJ, CJSW, are also process-and geometry-dependent and can be formulated by the p-n junction theory or measured experimentally. Intrinsic capacitances, such as CGs, C G ~ , , CGB, etc., are caused by the gate induced charges in the channel region as shown in Fig. 2. They are nonlinear capacitances which are bias-dependent and so can not be easily modeled. This paper will be focused on the development of an intrinsic capacitance model for short-chan-ne1 MOSFET's. Meyer [l] is the first to present a capacitance model which is widely used in SPICE2. Much work [2]-[6] has been placed on the study of an improved model for solving two existing problems. Ward and Dutton 121 pointed out the charge nonconservation problem …